pub fn fp8_fp8_gemm_n128_m128(
gpu: &dyn GpuBackend,
kernel: KernelHandle,
a_fp8: DevicePtr,
b_fp8: DevicePtr,
output: DevicePtr,
m: u32,
n: u32,
k: u32,
stream: u64,
) -> Result<()>Expand description
M128 variant of fp8_fp8_gemm_n128: halves B re-reads for large M (ISL > 128).
Each CTA covers 128 rows of A, loading B once for both 64-row halves. ~2× speedup on Q/K/V projections (FP8 activations × FP8 weights) at ISL≥128. Compact FP8 A smem → 6 blocks/SM vs 3 for fp8_gemm_t_m128.
Grid: (ceil(N/128), ceil(M/128), 1) Block: (128, 1, 1)