Function fp8_gemv_rowscale_batch8_rt2 

pub fn fp8_gemv_rowscale_batch8_rt2(
    gpu: &dyn GpuBackend,
    kernel: KernelHandle,
    input: DevicePtr,
    weight: &Fp8DenseWeight,
    output: DevicePtr,
    m: u32,
    n: u32,
    k: u32,
    stream: u64,
) -> Result<()>

Register-tiled batched row-scaled FP8 GEMV (M<=8, T=2 outputs/thread) — the FP8 twin of w4a16_gemv_batch8_rt2, for the DFlash drafter PROPOSE path. input [M, K] BF16, output [M, N] BF16; per-row f32 scale applied at write-out inside the kernel. Replaces the prefill-class tile GEMMs (fp8_gemm_t_row_scaled M64-tile / _m16) that pad 87%/50% of their M-tile at M=8 (~100 GB/s measured vs 180+ for the rt family). Drafter-side numerics: correctness-free under strict-argmax accept. Kernel: fp8_gemv_rowscale_batch8_rt2 (module fp8_gemv_rt). Grid: (ceil(N/8), 1, 1) Block: (256, 1, 1). Requires K % 16 == 0.