pub fn silu_mul_quant_fp8(
gpu: &dyn GpuBackend,
kernel: KernelHandle,
gate: DevicePtr,
up: DevicePtr,
out_fp8: DevicePtr,
a_scale: DevicePtr,
out_bf16: DevicePtr,
m: u32,
k: u32,
stream: u64,
) -> Result<()>Expand description
Fused SiLU·mul + per-token-group(128) FP8-E4M3 quantization — replaces the
silu_mul → per_token_group_quant_fp8 pair on the W8A8 prefill down-path
without materializing the BF16 intermediate. Bit-identical to the pair
(product rounds through BF16 before the group max; same reduction order,
scale floor, and SATFINITE encode).
out_bf16 is nullable (DevicePtr::NULL): pass the post-SiLU BF16 buffer
only when a downstream consumer needs it (expert down_proj LoRA fold).
Kernel: silu_mul_quant_fp8(gate, up, out_fp8, a_scale, out_bf16, M, K)
Grid: (M, 1, 1) Block: (128, 1, 1). Caller must ensure k % 128 == 0
and k / 128 <= 16 (SILU_QUANT_MAX_GROUPS) — fall back to the unfused
pair otherwise.